1
 2
 3
 4
 5
 6
 7
 8
 9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
class SimPort:
    def __init__(self, sim, pin, port, attrs, invert):
        self.pin = pin
        self.port = port
        self.attrs = attrs
        self.invert = invert # TODO: support invert

        if pin.xdr == 0:
            if 'i' in pin.dir:
                sim.add_process(self.in_xdr0)
            if 'o' in pin.dir:
                sim.add_process(self.out_xdr0)

        elif pin.xdr == 1:
            if 'i' in pin.dir:
                sim.add_process(self.in_xdr1)
            if 'o' in pin.dir:
                sim.add_process(self.out_xdr1)

    async def in_xdr0(self):
        await Passive()

        while True:
            await self.port.io.changed()
            value = await self.port.io.get()
            await self.pin.i.set(value)

    async def out_xdr0(self):
        await Passive()

        while True:
            await self.pin.o.changed()
            value = await self.pin.o.get()
            await self.port.io.set(value)

    async def in_xdr1(self):
        await Passive()
        next = 0

        while True:
            await self.pin.i_clk.changed(1)
            await Settle()
            await self.pin.i.set(next)
            next = await self.port.io.get()

    async def out_xdr1(self):
        await Passive()
        next = 0

        while True:
            await self.pin.o_clk.changed(1)
            await Settle()
            await self.port.io.set(next)
            next = await self.pin.o.get()


class SimPlatform(ResourceManager):
    def prepare(self, sim):
        for pin, port, attrs, invert in self.iter_single_ended_pins():
            SimPort(sim, pin, port, attrs, invert)