diff --git a/litex/soc/cores/cpu/rocket/crt0.S b/litex/soc/cores/cpu/rocket/crt0.S index 69b9d574..5fd4df4d 100644 --- a/litex/soc/cores/cpu/rocket/crt0.S +++ b/litex/soc/cores/cpu/rocket/crt0.S @@ -57,6 +57,19 @@ crt_init: la a0, trap_entry csrw mtvec, a0 +data_init: + la a0, _fdata + la a1, _edata + la a2, _rdata +data_loop: + beq a0,a1,data_done + ld a3,0(a2) + sd a3,0(a0) + add a0,a0,8 + add a2,a2,8 + j data_loop +data_done: + bss_init: la a0, _fbss la a1, _ebss diff --git a/litex/soc/software/bios/linker.ld b/litex/soc/software/bios/linker.ld index ee88f2e6..c67e81a7 100644 --- a/litex/soc/software/bios/linker.ld +++ b/litex/soc/software/bios/linker.ld @@ -52,7 +52,7 @@ SECTIONS FILL(0); . = ALIGN(8); _edata = .; - } > rom + } > sram AT > rom .bss : { @@ -77,3 +77,5 @@ SECTIONS } PROVIDE(_fstack = ORIGIN(sram) + LENGTH(sram) - 8); + +PROVIDE(_rdata = LOADADDR(.data));