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Pasted by Anonymous on Tue Apr 28 20:03:37 2020 UTC as Text only
#--------------------------------------------------------------------------------
# Auto-generated by Migen (3f9809b) & LiteX (56aa7897) on 2020-04-28 22:00:48
#--------------------------------------------------------------------------------
csr_base,ctrl,0x82000000,,
csr_base,uart_phy,0x82001000,,
csr_base,uart,0x82001800,,
csr_base,timer0,0x82002000,,
csr_base,sdram,0x82002800,,
csr_base,io_dp_pu,0x82003000,,
csr_base,analyzer,0x82003800,,
csr_register,ctrl_reset,0x82000000,1,rw
csr_register,ctrl_scratch,0x82000004,4,rw
csr_register,ctrl_bus_errors,0x82000014,4,ro
csr_register,uart_phy_tuning_word,0x82001000,4,rw
csr_register,uart_rxtx,0x82001800,1,rw
csr_register,uart_txfull,0x82001804,1,ro
csr_register,uart_rxempty,0x82001808,1,ro
csr_register,uart_ev_status,0x8200180c,1,rw
csr_register,uart_ev_pending,0x82001810,1,rw
csr_register,uart_ev_enable,0x82001814,1,rw
csr_register,timer0_load,0x82002000,4,rw
csr_register,timer0_reload,0x82002010,4,rw
csr_register,timer0_en,0x82002020,1,rw
csr_register,timer0_update_value,0x82002024,1,rw
csr_register,timer0_value,0x82002028,4,ro
csr_register,timer0_ev_status,0x82002038,1,rw
csr_register,timer0_ev_pending,0x8200203c,1,rw
csr_register,timer0_ev_enable,0x82002040,1,rw
csr_register,sdram_dfii_control,0x82002800,1,rw
csr_register,sdram_dfii_pi0_command,0x82002804,1,rw
csr_register,sdram_dfii_pi0_command_issue,0x82002808,1,rw
csr_register,sdram_dfii_pi0_address,0x8200280c,2,rw
csr_register,sdram_dfii_pi0_baddress,0x82002814,1,rw
csr_register,sdram_dfii_pi0_wrdata,0x82002818,4,rw
csr_register,sdram_dfii_pi0_rddata,0x82002828,4,ro
csr_register,io_dp_pu_in,0x82003000,1,ro
csr_register,io_dp_pu_out,0x82003004,1,rw
csr_register,analyzer_mux_value,0x82003800,1,rw
csr_register,analyzer_trigger_enable,0x82003804,1,rw
csr_register,analyzer_trigger_done,0x82003808,1,ro
csr_register,analyzer_trigger_mem_write,0x8200380c,1,rw
csr_register,analyzer_trigger_mem_mask,0x82003810,1,rw
csr_register,analyzer_trigger_mem_value,0x82003814,1,rw
csr_register,analyzer_trigger_mem_full,0x82003818,1,ro
csr_register,analyzer_subsampler_value,0x8200381c,2,rw
csr_register,analyzer_storage_enable,0x82003824,1,rw
csr_register,analyzer_storage_done,0x82003828,1,ro
csr_register,analyzer_storage_length,0x8200382c,2,rw
csr_register,analyzer_storage_offset,0x82003834,2,rw
csr_register,analyzer_storage_mem_valid,0x8200383c,1,ro
csr_register,analyzer_storage_mem_data,0x82003840,1,ro
constant,config_clock_frequency,48000000,,
constant,config_cpu_has_interrupt,None,,
constant,config_cpu_reset_addr,0,,
constant,config_cpu_type_vexriscv,None,,
constant,config_cpu_variant_standard,None,,
constant,config_csr_data_width,8,,
constant,config_csr_alignment,32,,
constant,config_l2_size,8192,,
constant,timer0_interrupt,1,,
constant,uart_interrupt,0,,
memory_region,rom,0x00000000,32768,cached
memory_region,sram,0x01000000,4096,cached
memory_region,csr,0x82000000,65536,io
memory_region,main_ram,0x40000000,4194304,cached