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Build your hardware, easily!
(c) Copyright 2012-2020 Enjoy-Digital
(c) Copyright 2007-2015 M-Labs
BIOS built on Apr 3 2020 03:18:46
BIOS CRC passed (66c43bd3)
Migen git sha1: 3f9809b
LiteX git sha1: 27f00851
--=============== SoC ==================--
CPU: VexRiscv @ 64MHz
ROM: 32KB
SRAM: 4KB
L2: 8KB
MAIN-RAM: 4096KB
--========== Initialization ============--
Initializing SDRAM...
SDRAM now under hardware control
Memtest OK
Memspeed Writes: 172Mbps Reads: 212Mbps
--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found
--============= Console ================--
litex>
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